Basic description:

a.) Application: 5 wire resistive USB interface touch panel controller
c.) Firmware version: V.1.08D
2. Hardware Specification
a.) Package :MLP-28
b.) Package Dimension:5 mm X 5 mm X 0.9 mm
c.) Supplied Voltage: 3.3 (2.7 ~ 3.6) VDC, 50 mVpp maximum ripple
d.) Power consumption: max. 75 mA
e.) Max. report rate: 200 pps(RS232)/250 pps(USB)
f.) Response time: max. 25 ms
g.) A/D resolution: 11 bits
h.) Good package: Tube

3. Firmware Specification
The C8051F321-GM microprocessor is applied for the controller module.
The firmware in this chip controls the Touch down detection, button status
detection.
The firmware characteristics
a.) Operation System: No operation system is required
b.) Protocol: RS232 8N1, 9600 Baud/USB 1.1 Low Speed/USB 2.0 Full
Speed/ PS2 compatible mouse
c.) Data package format: the protocols can be classified into 2 groups:
Diagnostics Packet and Report Packet

ETP-CP-S5XU 5 wire TouchKit USB
control chip (MLP-28)
V. 1. 08D 73pcs/Tube

Analog Peripherals
10-Bit ADC

• ±1 LSB INL; no missing codes
• Programmable throughput up to 200 ksps
• Up to 13 external inputs; programmable as single-ended or differential
• Built-in temperature sensor (±3 °C)
  Two Comparators
  Internal Voltage Reference: 2.4 V
  POR/Brown-out Detector
  USB Function Controller
• USB specification 2.0 compliant
• Full-speed (12 Mbps) or low-speed (1.5 Mbps) operation
• Integrated clock recovery; no external crystal required for either fullspeed or low-speed operation
• Supports eight flexible endpoints
• Dedicated 1 kB USB buffer memory
• Integrated transceiver; no external resistors required On-Chip Debug
• On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required)
• Provides breakpoints, single stepping
• Inspect/modify memory, registers, and USB memory
• Superior performance to emulation systems using ICE-chips, target pods, and sockets
  Operating Voltage: 2.7 to 5.25 V
  Temperature Range: -40 to +85 °C

High-Speed 8051 ?C Core

• Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks
• Up to 25 MIPS throughput with 25 MHz Clock
• Expanded interrupt handler Memory
• 1280 bytes data RAM
• 16 kB Flash; in-system programmable in 512-byte sectors (512 bytes are reserved)
  Digital Peripherals
• 21 port I/O; all are 5 V tolerant
• Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports available concurrently
• Programmable 16-bit counter/timer array with five capture/compare modules
• 4 general-purpose 16-bit counter/timers Clock Sources
• Internal oscillator: 0.25% accuracy with clock recovery enabled; supports all USB and UART modes
• External oscillator: Crystal, RC, C, or Clock
• On-chip clock multiplier for USB controller
  Voltage Regulator
• On-chip voltage regulator supports USB bus-powered operation
• Regulator bypass mode supports USB self-powered operation Package
• 28-pin QFN (lead-free package)
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